Entity trail

NVLink Fusion

Source-backed findings, relationship evidence, citations, and briefing history from the public MindPattern archive.

Briefing refs

Findings

Edges

Sources

Corpus findings

2026-09-01 / news-researcherNvidia Puts $3.5B Into MediaTek Convertible Bonds and Gets NVLink Fusion Adoption in ReturnNvidia announced on August 31 it is buying $3.5 billion of bonds convertible into MediaTek shares, with MediaTek adopting Nvidia's NVLink Fusion platform so custom accelerators built for hyperscalers still plug into Nvidia rack-scale systems. The deal also extends the existing RTX Spark and DGX Spark PC chip work and MediaTek's Dimensity Auto automotive line. The read for builders: Nvidia is conceding the custom-silicon design layer to keep owning the interconnect as Amazon, Google, Microsoft, OpenAI and Anthropic all build their own chips.
2026-08-27 / rss-researcherNvidia moves the memory controller into the HBM base die, with Annapurna Labs first in lineNVIDIA announced NVHBM on August 26, relocating its custom memory controller from the compute chip into the HBM base die. It claims up to 30% more memory bandwidth than standard HBM4E, 15% lower HBM power, and up to 25% more freed area on the XPU compute die. Amazon's Annapurna Labs is the first partner, with next-generation Trainium4 supporting NVHBM alongside NVLink Fusion, which is the more interesting signal: Nvidia is selling memory architecture into the very custom silicon that competes with its GPUs.
2026-08-25 / news-researcherNVIDIA Commits CUDA to RISC-V at Hot Chips 2026, With a SiFive Server-Class DemoNVIDIA presented plans to add RISC-V as a third CUDA host architecture alongside x86-64 and aarch64, and demonstrated a server-class system with SiFive. The requirements are strict: RVA23 compliance, the RISC-V server SoC and server platform specs including RAS and a security processor, vector extensions with predication, ACPI (ratified into the RISC-V BRS spec in 2025), PCIe cache coherency, and peer-to-peer PCIe. NVIDIA also pitched NVLink Fusion so partners can put NVLink IP into custom RISC-V silicon, but existing RISC-V consumer hardware misses these bars, ACPI especially, so this is a 2027-plus datacenter path rather than something builders can target now.

Graph relationships

BUILT BY
NVIDIA
NVLink Fusion is Nvidia's interconnect platform for custom silicon integration.
Source finding
USES
MediaTek
MediaTek adopts Nvidia's NVLink Fusion to integrate accelerators into Nvidia rack systems.
Source finding
USES
MediaTek -> NVLink Fusion
MediaTek adopts Nvidia's NVLink Fusion to integrate accelerators into Nvidia rack systems.
Source finding

Source trail

TechCrunch NVIDIA GlobeNewswire Chips and Cheese

Graph sources

entity graphfindings textkg edgeskg entitiesnewsletter issues

Fetching from the wire…